While our conventional Overclocking mechanism is to utilize this motherboard's dynamic dividers in order to boost the memory's speed, we found that the dividers are essentially incapable of operating beyond a 1:1 ratio. Thus, we had to begin Overclocking in the conventional method, by raising the FSB in small steps, and utilizing Memtest x86 +'s test 8 to test for stability in between. Due to the naturally high latencies of this memory, we simply left latency detection and setting up to the motherboard, which automatically boosted the tRAS timing as was necessary.
Starting our memory's clocking hops from the basic 800MHz (and holding it at 1:1), we reached our first barrier at a reasonable 833MHz, at which point the motherboard dropped the tRAS from 12 to 17. With this drop in place, we continued to clock onward and upward (with the processor's voltage being maintained at a healthy 1.5V and the memory's left at a reasonable 1.9V), reaching our next tRAS barrier at 250MHz, at which point it reached 19. From this point onward, we managed to progress up the ladder another 25 MHz, reaching a final stable limit of 875 MHz at the settings of 5-5-5-19.
While in the end 875MHz isn't earth shattering, it is still a fair amount of headroom for those with high multiplier processors. For individuals like us, and the 530J Overclocking CPU utilized, 875 is just the beginning, especially when the chip is known to pass 1,000 with ease. From this point onward, no increase in voltage or loosing of latency would help our fledgling memory, thus leaving us with a stable top speed of 875MHz. What remained to be seen however, was if having a lower FSB operating at 1:1 with the memory, or a higher FSB operating asynchronously (at 933MHz for the time being) would provide more bandwidth. As to the images, remember that DDR2, much like Intel's FSB speeds is measured by multiplying the frequency at hand by 4, thus turning our 218.7 into 875.
