Slot1 multiples revealed?

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Slot1 multiples revealed?

Postby atang1 » Thu Nov 14, 2002 6:03 pm

Since the revelation of slot1 core voltages, many slot1 motherboards became very interesting. One of them is Diamond Micronics c300, an earlier motherboards which is very solidly designed and built. Core voltage has the full gamut of 1.2 to 3.5 volts. It is unfortunately built with the 440LX chipset which limits it to 66 mhz(overclockable up to 83mhz FSB). And the original bios limited the multiples from 2.0x to 5.0x(A06 version). Then they updated it to A07 version which supports 5.5x multiple.

Why is it wonderful? Because this motherboard became very much a collector's item. Intel had in its infinite wisdom supplied 66mhz cpus up to 16.0x, made a slot1 pinout that has the multiples defined in a folded arrangement.

3.0x=8.5x at 66mhz use 566mhz fcpga chip on slotket
3.5x=9.0x 600mhz
4.0x=10.5x 700mhz
4.5x=11.5x 766mhz
5.0x=12.0x 800mhz
5.5x=13.0x 866mhz(A07 version bios only)

There are gaps due to the lack of one pinout on the Micronics slot1 socket which bios can not switch to get the full range up to 16.0x. Wait state in bios does not have to be changed because WinME or later operating system can adjust itself in Windows and browser environment.

You can still cherry pick your fixed multiples of Celeron or PIII cpus so that when the multiples are set, the Diamond Micronics can run faster cpus, and even overclocking if some core voltage pinouts are taped(electrically isolated) and H.ODA's softFSB or cpuFSB software is used.

Have fun. Isn't undocumented specifications interesting?
atang1
 

Postby atang1 » Fri Nov 15, 2002 3:37 am

What is significant is the concept of what the bios should be, back in 1999.

The bios will start any cpu at 2.0x multiples before you set the proper multiples and save it in the cmos. Today the concept of the fixed multiples gives people the wrong idea that fixed multiples are single multiple, cpu speed can not be changed. So, some bios became very limited. You can only change speed by the FSB. You have to update the bios to even recognize the cpu of your choice.

In fact, fixed multiples can be shifted downward but the maximum speed is programmed internally in the cpu, or externally too as in the AMD designed cpus. The fact that slot1 has 4 pinouts(BF0, BF1, BF2 and BF3) which controls the multiples means you can manipulate somewhat upto the maximum. And if the cpu gets too hot , it can be slowed down by multiples instead of intermitant duty cycle percentage change(cpucool use suspend mode by the clock cycles).

So, what else is new? AMD k6-2 has 6.0x limit and some steppings had only 5.0x maximum.

More on multiples later If we can only program the micro codes of these cpus to get more multiples in Intel cpus? Can we changed the multiples in Windows envirenment, ask Microsoft?
Last edited by atang1 on Fri Nov 15, 2002 4:17 am, edited 1 time in total.
atang1
 

Postby atang1 » Fri Nov 15, 2002 4:16 am

So, fixed multiple cpus use the 4 pins to tell the bios what speed it can do. The pins are BF0, BF1, BF2 and BF3. If we want to change speed, we pull some pins up to Vcore or we ground the pin to ground. IDT used to do their multiple limitation that way on their C6 Winchip.

If you want to have the bios control the multiples then you cut off all the pins. Or you could do it externally by cutting pins or tie them to ground by conductive paint to near by grounded pin. Of course, you should check the internal connection on these pins by a multimeter. Check the resistance to ground or to Vcore pins. Then you decide what the computer should know what pin has what voltage. Isn't that how you change the AMD Athlons by connecting the dots correctly? Will this work on all the Intel cpus, probably not because of PNP development in bios' structured programming. Cpu internal hard wiring of multiples may have to be over ruled by address switching inside the cpu in Windows environment?

So much for Intel cpu multiple manipulations.

More on multiples later. Why cpu ID sets the multiples in the bios and bypasses the multiple pins? PNP(plug and play), of course.
atang1
 

Postby atang1 » Mon Nov 18, 2002 2:42 pm

Now you found out that regardless what multiples you set, the Intel cpu is run on internal set multiples. That the bios has to recognize the cpu ID to be able to run the cpu. And that mhz info is posted on the screen when you boot and the cpu works.

But a PIII 733/133/256/1.75v can be run on a slot1 motherboard which has bios that can support the core voltage and 66 mhz FSB. Which means 5.5x multiple will run 366mhz at 66mhz FSB. The puzzle is that the bios will only support 5.0x. So is it running at 333 mhz or 366 mhz? You have to use Sandra, or Wintune or Powerleap cpu control panel to get the true speed of the cpu?

So, if you have 6.5x multiples in your 66 mhz FSB bios, will your Intel Celeron with 15.0x fixed multiples run 990 mhz? Intel is banking on it, because the BF0-3 pins are identical. But then, the internal PLL on the cpu chip does not care what the BF0-3 pin information is. It will run 990 mhz and with the proper wait state in the cpu, transfer data perfectly to the front side bus. The bios has to recognize the speed to tell you what the true speed is after you boot. Some speeds are calculated when you change FSB speed, some speed is printed from the cpu ID, but that is another story.

Confused? yes. Changeable multiples? No. So, the question has to be what can you do to the PLL multiples inside the cpu? How did Intel change them multiples on each cpu?
atang1
 

Postby atang1 » Mon Nov 18, 2002 3:00 pm

So H. Oda astonished the world by saying that he has WcpuA2 program which can change the PLL ratio for the internal cache with respect to the speed of the cpu, all in the windows environment.

If you can change the register of the PLL for the cache, then surely, you can change the PLL of the cpu and changed the multiples just like changing the FSB by changing the PLL ratio in softfsb or cpuFSB?

Have you search the internet for such a software that can change the cpu multiples?
atang1
 

Postby atang1 » Tue Dec 03, 2002 8:08 am

While we are talking about changing multiples, we must explore the bios to see if it takes care of changing wait state by changing multiples. Obviously, when multiples go up, the wait state has to be reduced to speed up the computer.

While the cpu has the multiples locked, the bios can change multiples. Some bios when you change multiples, the wait state of data transfer has to be changed. So if your cpu is 333mhz, running at 5.0x; you changed the multiples to 7.5x in the bios. See if your computer runs faster or not. Some bios will not change the wait state because the bios is limited to 1 or 2 mb flash memory. Just not enough memory to reduce wait state to the memory(sdram). But the 4 mb flash has sufficient room to have multiples changed; effectivelyand efficiently reduce the wait states. Interesting concept to explore, while I am experimenting with Alton V605A, which I fixed up by bending the floppy socket up a little momentarily, to restore all the contacts on the traces to the sdram sockets. Obviously, in the Award bios there is to be a sweet spot between 1.5x and 10.5x.

Is this science fiction or not? That is the question? Reducing wait state is the most effective way of speeding up the computer. Zero wait state is forever a dream to computer buffs.
atang1
 

Postby atang1 » Sun Dec 22, 2002 1:32 pm

Often times, people unlock AMD cpus and did not realize that the multiples they have is already the highest they can get. Officially, an Athlon XP is 12x and after they unlock the cpu, it is only 13x. This is because in the run, the fastest cpu is 2100+ and the multiple is 13x. If you buy the fastest lot that has 2800+, but you picked 2200+(14x locked); you may get 17x when you unlocked the multiples.

This happens to K6-2 when the older 350 mhz units only had 5.0x. Later production in late 1999, the 400 mhz units has built in 6.0x/2.0x and 5.5x as well.

Turned out, K6-2 already has MSR(model specific register). The latest MP still carry on that tradition. When the cpu gets hot, the multiples are shifted downward. Sometimes, the cpu will reboot at a slow speed. You have to reinspect the thermal grease and reapply some, to get the speed back to top speed.
atang1
 

Postby atang1 » Mon Dec 30, 2002 5:13 am

Once you search for P4 cpu specifications and see the abreviated schematic of the PLL inside the chip, you know that a voltage is generated to control the varactor on the chip whcih sets the multiplier factor. A special filtor is needed externally, to cut the noice below -28db at 66 mhz and allow it to raise naturally up to the highest frequency. The external analog signal voltage to control the multiples is on a pinout called VCCiopll. This is different from the old pinouts of BF0-3.

Tracing the voltage regulators on motherboards, you see the ATX power connector. There are voltage regulators for core and I/O voltages, voltage regulator for memory slots and voltage regulator for AGP slot to accomodate all the changing rquirement depending on your components or cards. There are however near the cpu socket a bunch of resistors just like the bunch of resistors near the FSB PLL. Those resistors are the voltage dividers that controls the PLL multiples. With SMB(the two wire signal standard on system management bus) you can use bios settings to control the multiples inside cpus and FSB outside of cpus. Bios setting is controlled by cpuID from the cpu.

Do you need bios update to change multiples? Yes, Indeedee. Up to the circuit limitation of varactor tuned tank oscillator, anyway. Cpu manufacturers still fix multiples by limiting the top speed you can run the multiples. Bios can only go so far. Now we have to find out the limit of each cpu made (tank circuit in cpu PLL by the varactor specification) in any production run? The game is still the same; but now we understand the fundamentals of multiplier factors and production runs of cpus. So if K5-2 is 400 and overheating will set it back to 350 on boot up; we know 2.8 ghz cpu os the top speed, we have to buy 2.4-2.5 ghz units and try our luck? Changing multiples or changing FSB depends on which can be finer resolution to reach the final small increment, the cpu will alllow us to overclock.

The disadvantage is still odd frequencies do not take advantage of wait state speed up. The actual computational speed up is negligible; unless overclock is in a critical state just squeeze in a wait state improvement. The wait state improvement is easier to achieve on higher wait cycles(clock cycle) than on slower wait cycles(still percentage improvement that counts).
atang1
 

Postby atang1 » Tue Mar 11, 2003 8:22 am

Cpu with lower fixed multipliers, can be fine tuned to run faster than a cpu with higher fixed multiplier on the same motherboard with the same components and cards.

The secret is in wait state of dram timing. Run fastest dram timing, and the percentage gain is more with cpu of lower multiplier. It helps even more if video buffers are larger, and video card has at least 2 mb memory.

So much about multipliers and multiples of FSB PLLs? That's why motherbaord designers knowing this kept multipliers out of overclockers hands. Synchronization is faster than asynchronization. Higher multiples require more wait state(clock cycles which are idling) which slows down the computer.
atang1
 

Postby atang1 » Tue May 06, 2003 7:20 am

Slot 1 core voltage design is based on the vid0-4 pin/core voltage chart. It carried into motherboards of late super socket 7, socket 370 and even P4 flavours. The reason is the development of low voltage drop out regulators(switchers rather than linear).

These low voltage drop out regulators use the vid0-4 pins to control 1.2 to 3.5 volts for cpu core, DDR VCC, etc. by ranges of voltages

If you study the Intel vid chart, you can easily change the range of voltages to be regulated by cutting the vid3 or vid4 to suit your purposes. Cut the pin off from the motherboard traces, if the internal circuit does not pull up to high such as cs5150. I am selling some of these modified motherboards on ebay. Others, had to be wired to the vid pin on the socket, or short to ground for lower core voltage range.

This of course made the modification from ppga to fcpga or fcpga2 cpu much easier. Or change older motherboards to take K6-2 cpus.

You should download the Intel chart and keep it for reference, when you change the core voltage on your motherboard.

Once your core voltage is suitable for an upgraded cpu. The multiples now come into play. Fixed multiple can only be played by lowering the FSB or raising the FSB frequencies.

However, fixed multiple still use the pinouts in the cpu socket on the motherboard to set the multiplier in the cpu. Except in the newer cpus, the multiplier is over ridden by the cpuID. So, these pins now reflect back to the motherboard to synchronize the wait state within the chipset..

Check you bios to see if you can lower the multiplier to slow the cpu down? The latest softmenu type of bios can be checked. But that does not mean you will be successful, until the cpuID and cpu codes can be uploaded from the bios. We are waiting for the day, that the data for cpu codes can be revealed and the codes can be uploaded to change the multipliers.
atang1
 


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