What's CAS?

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What's CAS?

Postby ChicoMarx » Fri May 24, 2002 8:22 am

Got a 512MB strip of Kingston PC2700 DDR333 memory. The BIOS reports a "CAS" of 2.5. What is this? Is 2.5 better than 2? What should be the CAS setting for a KT333 mobo with an XP2100+ CPU?
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Postby Aibohphobia » Fri May 24, 2002 11:01 am

CAS 2 and 2.5 are both memory cycle timings. There is barely any difference between them, besides memory benchmarkings--as the difference is in nanoseconds. CAS 2 is better than 2.5, but really, there is barely a difference. You can research your particular stick of ram to see if it runs @ CAS 2 @ 333mhz, but it probably is a CAS 2.5 stick, which means the cycle timing for CAS 2.5 is lower than that for CAS 2.
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Postby atang1 » Sun May 26, 2002 12:15 am

In computer archetecture, memory banks are connected to a single bus. To use specific banks of memory you have to select or deselect each bank. So, you have to have memory address and chip select to operate each bank of interest. CAS is chip select, And RAS is refresh select of each bank of memory to sustain data state whether it is one or zero.

Today, the memories are made of small capacitance and the charge will leak away and require refresh cycles on each bank to sustain the data integrity.

So, CAS 2, or 3 is after two clock cycles or after three clock cycles, the specific bank of memory will be read or written. Now, 2.5 cycle is tricky. It does not mean, you can work the timing cycle in 1/2 of a square wave. It means, the wait state is not at the begining of the third cycle, but it started at the middle of the second cylce. That means you have to have another clock which is twice as fast, to start at 2.5 cycle sync'ed to the FSB clock.

This improves the computer memory access speed by less than 1/5 or 20%. But the read and write speed is still the same, whether it is DDR or normal FSB speed. So, the real gain is in the overhead(access speed); for long periods of read or write, the access speed improvement is practically nothing to brag about.

Everything you ever want to know about CAS? Not much to know, is there?
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Postby datektrader21 » Sun May 26, 2002 12:50 am

so you should change ras with cas to gain even more performance?
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Postby Aibohphobia » Sun May 26, 2002 9:51 pm

Row Precharge Time.RAM receives, stores and sends data in cycles. This setting is concerned with charging before a refresh. The RAS (Row Address Strobe) accumulates a charge before refresh. If it is not allowed to accumulate enough charge before a refresh then data can be lost. 2T sets the cycle faster than 3T. There's only the two settings. You may find some RAM cannot fully charge with a setting of 2T which can cause a hardware lock up or corrupt data.

RAS Pulse Width. This setting controls the number of RAS cycles allocated to each pulse width. The settings are 5T and 6T. 5T will provide a slight memory performance boost over 6T.

RAS to CAS Delay. This setting controls the timing delay between CAS and RAS. These are the signals used when RAM is written to or read from. This setting at 2T can increase performance as less cycles are required for the RAM to read and write.


Yes but some mixtures of RAS and CAS settings can cause crashing and data corruption.
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Postby atang1 » Mon May 27, 2002 3:36 am

When you explain it by column CAS and row RAS, instead of bank switching. You have to explain 8 bit column, 16 bit column, 32 bit column all the way to 192 bit column in video memory columns. And the bits row access from 0 to 191.

In real life, the memory banks are in columns as you can see the individual drams on a dimm in 8 bit arrangement(never more tham 8 bits). And is selected by the bit, using dram chip select. Row access for refresh RAS(terminology only applies to refresh cycles) every 5 cycles or 6 cycles after in between read or write. Those bits having written or is read "zero" do not require refresh. Only those "ones" that was left without being ever writiten again needed refresh(charge up to between 2.4 volts and 5.0 volts for a 5 volt memory cell).

Because of these actual performance RAS 5T or 6T, is again merely overhead. The actual requirement of refresh can be none if every memeory cell is written every cycle. In real life, however, dram memory is mostly for read only purpose and needs refresh every RAS cycle 5T or 6T. In other words RAS is beyond the name of a strobe signal(clock); it is used to indicate "Refresh" cycles.

Looking beyond which refresh cycle you use; it depends on the quality of your drams and its manufacturing process. A single capacitor or a cmos transistor can require shorter refresh period.

So, CAS becomes "chip access select" and RAS becomes "Refresh access select". What's the difference? Is there ever anything new?
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