Table of Contents:
The ASUS Rampage III Formula9 motherboard uses a modified version of the American Megatrends AMIBIOS which is PnP, DMI2.0, WIM2.0, SM BIOS 2.5, and ACPI 2.0a compliant. The BIOS is stored on a 16Mb Flash ROM chip. The menu is split up into Extreme Tweaker, Main, Advanced, Power, Boot, Tools and Exit menus lined up on top of the screen.
The Main Menu is where the system information is displayed. Time, Date, Language and detected SATA drives from 1-6 are displayed here. The System Configuration submenu is where the BIOS Version, Date, CPU installed and available memory is displayed. The Storage Configuration menu is where you set your SATA RAID arrays and Hard Disk Write protect and SATA detect time.
The Extreme Tweaker menu is where all of the overclocking and tweaking of the board is accomplished. There is a Tuning Mode with two settings: Extreme OC and Gaming. Extreme OC gives the maximum tuning degree of freedom, while Gaming gives the major tuning settings for system performance boost. The CPU Level Up gives you the choice to set the CPU to i7-950 3.06GHz, i7-965 3.2GHz from the i7-920 we use for testing. The Ai Overclock Tuner menu allows you to overclock with Manual, Auto, DOCP, and XMP, CPU Level Up, Memory Level Up, ROG Memory Profile overclock options. The Auto setting is the default setting and will have the optimal settings for the system. Manual allows you to individually set overclocking. XMP allows you to use Intel eXtreme Memory Profiles. Here’s a chart of the various overclocking settings:
|
Setting |
Range |
|
DRAM OC Profile |
DDDR3-1805, DDR3-2006MHz |
|
eXtreme Memory Profile |
Disabled, High Performance, High Frequency |
|
CPU Ratio setting |
Depends on CPU |
|
BCLK Frequency |
100-500 |
|
PCIE Frequency |
100-200 |
|
DRAM Frequency |
Dependent on BCLK |
|
UCLK Frequency |
Dependent on DRAM Frequency |
|
QPI Link Data Rate |
4800, 5866, 6400MHz |
|
CAS Latency |
3,4-10, 11 DRAM Clock |
|
RAS to CAS Delay |
3,4-14,15 DRAM Clock |
|
RAS PRE TIME |
3,4-14,15 DRAM Clock |
|
RAS ACT Time |
3,4-30,30 DRAM Clock |
|
RAS to RAS Delay |
1-7 DRAM Clock |
|
Ref Cycle Time |
36, 48, 60, 72, 82, 88, 90, 100, 110, 124,132, 140, 150, 160 DRAM Clock |
|
WRITE Recovery Time |
1-15 DRAM Clock |
|
READ to PRE |
3-15 DRAM Clock |
|
FOUR ACT WIN |
1-63 DRAM CLOCK |
|
Back TO Back CAS Delay |
4-32 DRAM Clock |
|
DRAM Timing Mode |
1N, 2N, 3N |
|
DRAM Round Trip latency on CHA/B/C |
1-175 DRAM Clock |
|
WRITE to READ Delay (DD) |
1-8 DRAM Clock |
|
WRITE to READ delay (DR) |
1-8 DRAM Clock |
|
Write to READ Delay (SR) |
10-22 DRAM Clock |
|
READ to WRITE delay (DD) |
2-14 DRAM Clock |
|
READ to WRITE Delay (DR) |
2-14 DRAM Clock |
|
READ to WRITE Delay (SR) |
2-14 DRAM Clock |
|
READ to READ Delay (DD) |
2-9 DRAM Clock |
|
READ to READ Delay (DR) |
2-9 DRAM Clock |
|
READ to READ Delay (SR) |
4, 6 DRAM Clock |
|
WRITE to WRITE Delay (DD) |
2-9 DRAM Clock |
|
WRITE to WRITE Delay (DR) |
2-9 DRAM Clock |
|
WRITE to WRITE Delay (SR) |
4, 6 DRAM Clock |
|
CPU Vcore voltage |
0.850000v-2.30000v 0.00625v interval |
|
PLL Voltage |
1.20575v-2/-5385v with a 0.01325v interval |
|
QPI/DRAM Core voltage |
1.20000V-2.50000v with a 0.00625v interval |
|
IOH Voltage |
1.10v-1.70v with a 0.02v interval |
|
IOH PCIE Voltage |
1.51050v-2.78250v with a 0.01325v interval |
|
ICH Voltage |
1.11300v-2.00075v with a 0.01325v interval |
|
ICH PCIE Voltage |
1.51050v-2.05375v with a 0.01325v interval |
|
DRAM Bus Voltage |
1.20575v-2.50425v with a 0.01v interval |
|
DRAM DATA Ref voltage on CHA/B/C |
-157.5mv to +200mv with a 12.5mv interval |
|
DRAM CTRL REF Voltage on CHA/B/C |
-157.5mv to +200mv with a 12.5mv interval |
|
CPU Differential Amplitude |
700mV, 800mV, 900mV, 1000mV |
|
IOH Clock Skew |
100ps, 200ps-1400ps, 1500ps |
|
Digi+ PWR Mode |
X-Power, T-Balanced |
|
PWM Volt mode |
0% calibrated, 50% calibration, full calibration |
|
CPU PWM Frequency |
250,500,750,1000khZ |
|
Extreme OC |
Mode 1, Mode 2 |
