Articles :: CAS RAS Latencies Explained :: Motherboards.org

Heather Skinner · 06-27-2005 · Category: Tech-planations

CAS and RAS Latencies


What is CAS?

"CAS" is short for Column Address Strobe. DRAM memory is designed like a grid or a matrix (similar to a spreadsheet) in that DRAM uses memory cells where the numbers and formulas typically go. And much like a spreadsheet, each DRAM cell has a row address and a column address (like column-B, row-12) or (column-AH, row-17) in a grid. CAS is the strobe that sets up the column timing.

What about RAS?

Another term frequently mentioned along with CAS is the RAS signal. RAS is an acronym for "Row Address Strobe" and just like a spreadsheet has the row and column addresses, the memory cells reference both rows and columns when marking the signal or 'strobe' of each clock cycle. In the case of RAS, it references the row.

What is CAS Latency?

Latency is defined as the interval between stimulation and response. This simply means the time it takes from starting a task to when it's completed or how long you must wait to get what you need.

CAS Latency (or Column Address Strobe Latency) is the delay, in clock cycles, before the RAM (Random Access Memory) performs a requested task. This means that a lower CAS Latency results in higher memory performance-especially when combined with higher speed modules. So CAS2 memory modules (which require only two clock cycles to perform a given operation) would essentially be faster than CAS3 (which prefer three cycles to do the same job).

The term "CAS2" is the same as "CL2" and both abbreviations are frequently interchanged when referencing this type of memory.

Is CAS2 Faster than CAS3?

Some people are under the impression that CAS2 should be 33% faster than CAS3 but this is not the case. While CAS2 is visibly faster and this is most apparent in games and programs requiring high memory bandwidth, the measurable performance gains are often only five to ten percent.

How Does CAS Latency Affect a Computer's Performance?

The combination of highest memory bus speed and lowest CAS latency produces the highest performing modules.

Looking at how the memory controller actually reads the memory, the process would go like this:

  1. The chipset accesses the ROW of the memory matrix by putting an address on the memory's address pins and activating the RAS signal.
  2. There is a waiting period for a few clock cycles (this is called the RAS-to-CAS Delay).
  3. The column address is put on the pins and the CAS signal is activated to access the correct COLUMN of the memory matrix.
  4. There is a wait a few clock cycles - this is known as CAS latency - and then the data appears on the pins of the RAM.
  5. The data at this time is clocked and read, usually one or two clock cycles.

It's important to note that the above is a very basic depiction; "burst" reads of data and processor caches also dramatically affect performance.

Lower CAS Latency is desirable for:

  • System Overclocking: some power users and computer gaming enthusiasts adjust a system's bios to perform outside the manufacturer's tested ranges or 'over-clock' the computer to extend performance to the absolute limits.
  • Computer Games: CAS2 memory is reputed to be more stable and ideal for operating at higher speeds, thus using faster memory can significantly enhance the playing experience of feature-rich games.
  • High Memory Bandwidth Programs: such as intensive graphics applications, advanced math computations and more.

Contents

  1. Introduction
  2. CAS and RAS Latencies
  3. Conclusion

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