Doc Overclock · 06-17-2002 · Category:
Bank Interleaving is an advanced chipset technique used by high-end motherboard chipsets to improve memory performance. Memory interleaving increases bandwidth by allowing simultaneous access to more than one piece of memory. What this does is improve performance because the processor can now transfer more information to or from the memory in the same amount of time helping to alleviate the processor-memory bottleneck that has been a major limiting factor in overall system performance.
The process of interleaving works as a result of dividing the system memory into multiple blocks. The most common numbers are two or four, called two-way or four-way interleaving. Each block of memory is accessed using different sets of control lines, which are merged together on the memory bus. When a read or write cycle has begun to one block, a read or write to other blocks can be overlapped with the first one.
The more blocks, the more that overlapping can be done. In order to get the best performance from this type of memory system, consecutive memory addresses are spread over the different blocks of memory. In other words, if you have 4 blocks of interleaved memory, the system doesn't fill the first block, and then the second and so on. It uses all 4 blocks, spreading the memory around so that the interleaving can be fully taken advantage of.
Can you use Interleaving with only one stick of memory?
In most cases the answer would be yes. In this kind of interleaving, the chipset can remember the location of up to four recently used "pages" of memory on the module and can return to them instantly. Depending on the chipset, it can also remember the last four pages per module, for a total of sixteen pages.
The amount of interleaving depends on the size and type of the memory chips on the computer's RAM modules. SDRAM is required for this technique. If the chips on the modules store 16 megabits each, the chipset can achieve two-way interleaving; if the chips are 64 megabits, four-way interleaving is possible.
- SPD And CAS Latency Values
- The Memory Bus
- Bank Interleaving
- System Timing and Memory Speed